# Cpc-cplink2

**URL:** <https://forum.cpcwiki.eu/t/cpc-cplink2/815>\
**Category:** CPC hardware\
**Tags:** hardware\
**Created:** [October 13, 2026, 6:07am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815 "2026-10-13T06:07:41Z")\
**Posts on this page:** 19\
**Page:** 1

<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 6:07am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/1 "2026-10-13T06:07:41Z")

</div>

Some of you may remember the excellent CPC-CPLINK created by Revaldinho. See [GitHub CPC-CPLINK](https://github.com/revaldinho/cpc-cplink).

I have taken this and created a backward compatible device using a Pico 2 with extra capability.

I am actually using an Olimex RP2350 Pico 2 development board.

 ![20261002_195426 (002)](https://forum.cpcwiki.eu/uploads/default/original/2X/2/2151270dfaeab224d81aa8a3eaf111cc1a127bff.jpeg)

You can see the PI Zero 2 on the back.

 ![20261002_195439 (002)](https://forum.cpcwiki.eu/uploads/default/original/2X/c/cf45e5d62a7666c943fb2613507bcbc67b516932.jpeg)

This can do everything the original CPC-CPLINK did, but now has deep FIFOs of 1024 bytes and the capability to provide data via ROM images back to the Amstrad CPC.

At the moment this is still very much in development but you can see the capability in the video below, where the ball is being rendered on the PI Zero and sent to the CPC for display.

[Video of bouncing ball.](https://youtube.com/shorts/LBNDuuel_Z8?is=CCOLvQoPzaLckHb6)

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<div class="post-metadata">

**Author:** ![Gryzor](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/gryzor/32/7_2.png) [@Gryzor](https://forum.cpcwiki.eu/u/Gryzor)\
**Post date:** [October 13, 2026, 7:39am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/2 "2026-10-13T07:39:55Z")

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Cue the “what makes it a CPC” discussion 😃

But it’s really cool.

For those who don’t remember the CPC-CPLINK:

> This is a card which allows you to connect an external co-processor, like a RaspberryPi, directly to any Amstrad CPC Computer.
> 
> The card provides an easy to use parallel interface between the processors using First-In First-Out (FIFO) hardware and a simple message passing software protocol. Voltage level shifting components are included so that both 3V3 and 5V co-processors can be connected directly. Most likely the co-processor will be a RaspberryPi, but the interface is suitable for other processors and systems including Arduinos, Teensy and PIC MCUs.

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 13, 2026, 11:04am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/3 "2026-10-13T11:04:16Z")

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What is the main difference between it and the original CPC-CPLINK from a practical point of view?

Is it worth upgrading?

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<div class="post-metadata">

**Author:** ![XeNoMoRPH](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/xenomorph/32/28_2.png) [@XeNoMoRPH](https://forum.cpcwiki.eu/u/XeNoMoRPH)\
**Post date:** [October 13, 2026, 11:25am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/4 "2026-10-13T11:25:11Z")

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Incredible, I do have the original, yes!!

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 6:15pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/5 "2026-10-13T18:15:26Z")

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The main objective was to increase the throughput of data from the PI to the CPC.

Yes the CPC-CPLINK2 has deeper FIFOs, now 1024 compare with 16) but this really does not change the speed of the IO requests from the CPC.

To improve the speed I added an extra GPIO called “ROM Not FIFO” (RNF). When this is HIGH, a pseudo ROM in the Pico is filled instead of the FIFO. An extract bit in the current Status register is then set to indicate there is data in the ROM (there are actually 2 ROMs available). The CPC can then just select the ROM (OUT &DFXX, NN) and copy the data (i.e. LDI).

So it is fully backward compatible with the original CPC-CPLINK but has this extra little trick to get a bit more data from the PI to the CPC.

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 13, 2026, 6:15pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/6 "2026-10-13T18:15:57Z")

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Similar to M4 DMA via fake ROMs?

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 6:18pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/7 "2026-10-13T18:18:03Z")

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Thanks, I am really having fun with this. I got my original CPC 664 when I was 16, before the 6128 was released (so a long time ago) and I am still using it today. This sort of project allows me to keep exploring and understanding the Amstrad CPC. I still enjoy it as much as I did when I was 16.

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 6:23pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/8 "2026-10-13T18:23:46Z")

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Not sure, I guess so, it provides two ROMs that you can fill without whatever you like.

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<div class="post-metadata">

**Author:** ![Richard\_Lloyd](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/r/898d66/32.png) [@Richard\_Lloyd](https://forum.cpcwiki.eu/u/Richard_Lloyd)\
**Post date:** [October 13, 2026, 7:50pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/9 "2026-10-13T19:50:16Z")

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Nice work! Thanks.

Is it available? I have two original CPC-CPLINK that I have written some software for and would be interested in trying this.

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 8:12pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/10 "2026-10-13T20:12:23Z")

</div>

Not available yet, very much in development at the moment. But hopefully by the end of the year should public on GitHub.

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 8:53pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/11 "2026-10-13T20:53:04Z")

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Here is an overview and usage.

 ![image](https://forum.cpcwiki.eu/uploads/default/original/2X/a/a61761f2d4ea4579c976ab4d756a017cfdf3a33f.png)

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 13, 2026, 8:54pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/12 "2026-10-13T20:54:43Z")

</div>

And if anyone is really interested this is the functional structure inside the Pico.

 ![image](https://forum.cpcwiki.eu/uploads/default/original/2X/4/4ca9773a2be8ca38848b844c5d3cdce1698b964b.png)

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 14, 2026, 1:24am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/13 "2026-10-14T01:24:00Z")

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can you provide programming docs at this stage? i can then create a class for you to use NTC BASIC with it - I’d love to see City3D Demo running using the Pi as a CoProcessor!

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<div class="post-metadata">

**Author:** ![norecess464](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/norecess464/32/189_2.png) [@norecess464](https://forum.cpcwiki.eu/u/norecess464)\
**Post date:** [October 14, 2026, 2:01am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/14 "2026-10-14T02:01:28Z")

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Really cool for sure! This will accelerate lots of things.

Support in PiStudio is planned ( [PiStudio: a Raspberry Pi-powered IDE for the Amstrad CPC · NoRecess464](https://www.norecess464.com/news/pistudio-a-raspberry-pi-powered-ide-for-the-amstrad-cpc/index.html) ).

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 14, 2026, 2:12am UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/15 "2026-10-14T02:12:44Z")

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Nice! Want to add NTC Basic to it? I’m sure the build chain will work nicely there.

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 14, 2026, 4:50pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/17 "2026-10-14T16:50:10Z")

</div>

Give me a month or so, I will post progress here.

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 16, 2026, 3:47pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/18 "2026-10-16T15:47:35Z")

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Auckland Demo… for CPC-CPLINK Improvement!

[![](https://forum.cpcwiki.eu/uploads/default/original/2X/c/c1a46df0fb164a01f4711676c6aac12c5b50d07a.jpeg "Auckland, New Zealand Z80 Technical Demo") ](https://www.youtube.com/watch?v=tyeTn8UTAHE)

A progression of the City3D demo coded in NTC BASIC - fly around Auckland, New Zealand

Some statistics:

Fly over Auckland, New Zealand, in wireframe, on an Amstrad CPC with 4 MB of  
expansion RAM. The whole city is in memory: 233,935 buildings, 43,082 road,  
rail, coast and water lines, 50,040 trees, the Sky Tower, the Harbour Bridge  
and the volcanoes - from OpenStreetMap, 409 square km.

NEEDS

- CPC 6128 or 464 (Z80, 4 MHz), 4 MB RAM expansion (200 RAM pages or more)
- UniDOS with a mass storage node (IDE, SD …): AUCKLAND.DAT is 3.8 MB  
(without UniDOS’s block read it loads a byte at a time: far too slow)
- WinAPE works too: IDE drive = AUCKLAND.IMG, UniDOS ROMs, 4 MB RAM

Files: AUCKLAND.BIN (the program, 35K) and AUCKLAND.DAT (the data), on the  
same drive. RUN"AUCKLAND

I have put all the analysis and tooling including shortly C code for Raspberry Pi (which you should be able to adapt). You can also feed the full NTC BASIC with the demo to claude and it will be able to recode the CPC side to use the PI side if you need.

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<div class="post-metadata">

**Author:** ![zhulien](https://forum.cpcwiki.eu/letter_avatar_proxy/v4/letter/z/ce7236/32.png) [@zhulien](https://forum.cpcwiki.eu/u/zhulien)\
**Post date:** [October 16, 2026, 4:02pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/19 "2026-10-16T16:02:00Z")

</div>

Demo Link:

> **[ntc/demo at master · PrimalNinja/ntc](https://github.com/PrimalNinja/ntc/tree/master/demo)**
>
> master/demo

Tooling:

> **[ntc/demo/auckland at master · PrimalNinja/ntc](https://github.com/PrimalNinja/ntc/tree/master/demo/auckland)**
>
> master/demo/auckland

CP-CPCLINK2 Code, Protocol etc which should be “almost” slot in:

> **[ntc/demo/auckland/coprocessor at master · PrimalNinja/ntc](https://github.com/PrimalNinja/ntc/tree/master/demo/auckland/coprocessor)**
>
> master/demo/auckland/coprocessor

Auckland Demo for CPC (without CP-CPCLINK2, but… needs 4mb RAM + UniDOS):

> **[ntc/src/bas/auckland at master · PrimalNinja/ntc](https://github.com/PrimalNinja/ntc/tree/master/src/bas/auckland)**
>
> master/src/bas/auckland

CP-CPLINK2 Version (might need some tweaks as I don’t have a card yet - but… should run without any extra RAM!)🙂

> **[ntc/src/bas/aucklink at master · PrimalNinja/ntc](https://github.com/PrimalNinja/ntc/tree/master/src/bas/aucklink)**
>
> master/src/bas/aucklink

From Claude:

I’ve written the coprocessor version: the engine in C, a protocol for the ROM window the card serves, and the CPC side. The card holds AUCKLAND.DAT, and the CPC no longer needs a RAM expansion. It’s in auckland.zip under `coprocessor/`, and in the NTC tree as `tools/s3dpi` and `src/bas/aucklink`. The Z80 draws the card’s line lists exactly as the C reference does (cmp.png: Z80 left, C right).

**Measured speed:** the card does the 3D, so the CPC’s frame is copying the list out of the ROM (about 45 ms) plus drawing it:

| View | Lines | List | CPC frame | fps |
| --- | --- | --- | --- | --- |
| Start | 440 | 1.7K | 0.29 s | 3.4 |
| Harbour Bridge | 300 | 1.3K | 0.22 s | 4.5 |
| Devonport | 1270 | 5.6K | 0.86 s | 1.2 |
| Sky Tower | 1400 | 7.7K | 1.13 s | 0.9 |

That’s 4 to 10 times the 0.2–0.4 fps baseline. Drawing lines with gfx\_line is now nearly all of the CPC’s time, so it’s the next thing to speed up. A lower line budget (B) trades detail for speed. The card’s side takes 0.03–0.2 ms a frame on a PC; I haven’t timed it on an RP2040.

**How the link works:**

- The CPC sends a small `F` packet per frame: pitch, roll and yaw (-1, 0 or 1), speed, frame skip, and line budget. There are also packets to say hello, jump to a view, and get a view’s name.
- The card’s ROM has a status block at `#C100`: “S3DP” when it’s ready, a sequence number, which list is newest, line count, altitude, compass and a message. Two 7.5K draw lists sit at `#C200` and `#E000`.
- A list is 3 bytes per point (MOVE or DRAW with x 0–319 and y 0–199), plus 1-byte PEN and END codes. Every point is already clipped to the screen.
- Each frame the CPC waits for the sequence number to change, copies the newest list out, sends the next `F`, then draws. The card builds the next frame while the CPC draws this one, filling whichever list the CPC isn’t reading.

**The C** is integer-only, so an RP2040 without an FPU is fine:

- `s3dpi.c` / `s3dpi.h`: the engine, with the same tiles, LOD distances, projection and line budget as the Z80 version.
- `card.c` / `card.h`: the card side. The card’s firmware hands each packet to `card_command()` and serves `rom[]` as its 16K ROM.
- `sim.c`: runs the whole link in one program and writes pictures plus a list file.
- `host.c`: the engine on its own, with timings.

**What’s unknown until the CPLINK2 docs are out:**

- **Ports:** the real I/O ports. Link.cls uses M4-style stand-ins: bytes to `#FE00`, kick at `#FC00`.
- **ROM number:** the stand-in is ROM 6.
- **Where the data lives:** if it’s on the card, the board needs 4 MB or more of flash. RP2040 flash is mapped at `0x10000000`, and `s3d_open` takes a pointer to the data. Alternatively the engine runs on a PC or Pi at the other end of the link, and the card just passes packets up and 7.5K lists down.
- **Tested so far:** only the simulated link (`sim.c`) and the Z80 drawing a list that `sim.c` wrote.

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<div class="post-metadata">

**Author:** ![Rabs](https://forum.cpcwiki.eu/user_avatar/forum.cpcwiki.eu/rabs/32/158_2.png) [@Rabs](https://forum.cpcwiki.eu/u/Rabs)\
**Post date:** [October 17, 2026, 3:15pm UTC](https://forum.cpcwiki.eu/t/cpc-cplink2/815/20 "2026-10-17T15:15:34Z")

</div>

That looks great. At the moment I am focusing on getting CPC-CPLINK2 working and making it as robust as I can. I will have a look at this when I get time. Everything you need to know about how to use CPC-CPLINK2 is in this slide, including the IO ports and ROM numbers.

 ![image](https://forum.cpcwiki.eu/uploads/default/original/2X/2/282f41259ee66a99b843c2d9121c038cadf9c9b9.png)
